Graduation Project: RISC-V processor and vector coprocessor
تفاصيل العمل
Designed and implemented a RISC‑V processor with a custom vector co‑processor extension to support parallel SIMD operations. Focused on hardware acceleration for data‑intensive tasks, enhancing performance and scalability in embedded systems. • My Role: 1st Phase I was responsible for Fetch stage and verification constraints of main processor.2nd phase I am working on the Execution and vector memory in vector co‑processor implementation.
بطاقة العمل
طلب عمل مماثل
